verilator
Verilog/SystemVerilog simulator
Verilator transforms the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single- or multi-threaded .cpp and .h files.
- Versions: 5.034
- Website: https://www.veripool.org/verilator/
- Licenses: LGPL 3
- Package source: gnu/packages/fpga.scm
- Builds: See build status
- Issues: See known issues
Installation
Install the latest version of verilator as follows:
guix install verilator
Or install a particular version:
guix install verilator@5.034
You can also install packages in augmented, pure or containerized environments for development or simply to try them out without polluting your user profile. See the guix shell documentation for more information.
Badge code
You can use the following badge to inform users of verilator about the latest version available in Guix.
Example HTML:
<a href='https://packages.guix.gnu.org/packages/verilator'><img src='https://packages.guix.gnu.org/packages/verilator/badges/latest-version.svg' alt='Version in GNU Guix'></a>
Example Markdown:
[](https://packages.guix.gnu.org/packages/verilator)
Example Org:
[[https://packages.guix.gnu.org/packages/verilator][https://packages.guix.gnu.org/packages/verilator/badges/latest-version.svg]]